Q1 Past Paper · PPSC/FPSC/NTS easy
A semiconductor diode conducts heavily when
A reverse biased above breakdown always without limit ✓ B unbiased at thermal equilibrium only for heavy conduction ✓ C forward biased beyond knee voltage ✓ D connected in parallel with reverse diode only ✓ Show Answer 💡 Explanation: Forward bias reduces barrier; current rises sharply after knee.
Q2 easy
Reverse saturation current in an ideal silicon diode at room temperature is
A equal to forward current always ✓ B very small (nanoampere range) ✓ C in the ampere range typically ✓ D proportional to forward voltage squared only ✓ Show Answer 💡 Explanation: Minority carrier diffusion causes tiny reverse current.
Q3 Past Paper · PPSC/FPSC/NTS easy
Zener diode is primarily used for
A rectification in forward region only ✓ B oscillation without feedback ✓ C current amplification like a BJT ✓ D voltage regulation in reverse breakdown region ✓ Show Answer 💡 Explanation: Zener maintains nearly constant voltage in breakdown.
Q4 medium
Peak inverse voltage (PIV) rating of a rectifier diode is
A maximum forward current only ✓ B power dissipation at room temperature only ✓ C junction capacitance at zero bias ✓ D maximum reverse voltage the diode can withstand without breakdown ✓ Show Answer 💡 Explanation: PIV defines safe reverse blocking capability.
Q5 easy
Half-wave rectifier output contains
A pure DC without any ripple ✓ B only one polarity of the input AC waveform ✓ C both polarities equally ✓ D only high-frequency harmonics without fundamental ✓ Show Answer 💡 Explanation: One diode passes alternate half-cycles only.
Q6 Past Paper · PPSC/FPSC/NTS easy
Full-wave bridge rectifier requires
A two diodes and center tap always ✓ B four diodes and no center-tapped transformer ✓ C one diode only ✓ D six diodes in star connection ✓ Show Answer 💡 Explanation: Bridge uses four diodes to rectify both half-cycles.
Q7 medium
Ripple factor of a rectifier output indicates
A only DC average without AC content ✓ B reverse breakdown voltage margin ✓ C transistor beta value ✓ D amount of AC component relative to DC component ✓ Show Answer 💡 Explanation: Lower ripple factor means smoother DC output.
Q8 easy
LED emits light when
A reverse breakdown occurs without recombination ✓ B electrons and holes recombine at the PN junction ✓ C only thermal heating without injection ✓ D gate voltage controls channel only like MOSFET ✓ Show Answer 💡 Explanation: Radiative recombination in direct-bandgap material produces photons.
Q9 Past Paper · PPSC/FPSC/NTS medium
Schottky diode has lower forward voltage drop than PN junction diode because
A it uses only indirect bandgap silicon always ✓ B it has no depletion region ever ✓ C metal-semiconductor junction has smaller barrier height ✓ D it operates only in Zener breakdown ✓ Show Answer 💡 Explanation: Schottky barrier diodes switch faster with ~0.2–0.4 V drop.
Q10 medium
Diode dynamic resistance rd is defined as
A slope of V-I curve at the operating point (dv/di) ✓ B reverse saturation current only ✓ C maximum forward current rating ✓ D thermal voltage times beta ✓ Show Answer 💡 Explanation: Small-signal resistance is inverse slope of static characteristic.
Q11 hard
Avalanche breakdown in a diode occurs when
A forward bias exceeds knee slightly only ✓ B gate oxide ruptures in MOSFET ✓ C only tunneling without multiplication ✓ D minority carriers accelerate and create impact ionization ✓ Show Answer 💡 Explanation: Carrier multiplication in high reverse field causes avalanche.
Q12 Past Paper · PPSC/FPSC/NTS hard
Tunnel (Zener) breakdown dominates in heavily doped junctions at
A very high reverse voltage only above 100 V always ✓ B forward conduction region only ✓ C lower reverse voltages (typically below about 5 V in silicon) ✓ D only in germanium without silicon ✓ Show Answer 💡 Explanation: Thin depletion layer enables quantum tunneling at low Vz.
Q13 medium
Varactor diode capacitance varies with
A reverse bias voltage ✓ B forward current only without voltage dependence ✓ C temperature only without bias ✓ D gate threshold in MOSFET sense ✓ Show Answer 💡 Explanation: Depletion width changes with reverse bias modulating capacitance.
Q14 Past Paper · PPSC/FPSC/NTS medium
Rectifier diode selection must consider
A only LED color wavelength ✓ B forward current rating, PIV and switching speed for the application ✓ C only op-amp slew rate ✓ D only flip-flop clock frequency without power ✓ Show Answer 💡 Explanation: Thermal, voltage and speed ratings ensure reliable rectification.
Q15 easy
In a common-emitter BJT amplifier, base current controls
A drain current without gate voltage ✓ B only emitter reverse leakage ✓ C large collector current via current gain β ✓ D op-amp offset voltage directly ✓ Show Answer 💡 Explanation: Small IB change modulates IC ≈ βIB in active region.
Q16 medium
BJT operates in saturation when
A collector-base junction is reverse biased only ✓ B emitter is open circuit ✓ C gate voltage is below threshold ✓ D both junctions are forward biased and VCE is small ✓ Show Answer 💡 Explanation: Saturation: VBE and VBC forward; device acts like closed switch.
Q17 Past Paper · PPSC/FPSC/NTS medium
Common-collector (emitter follower) configuration has
A low input and high output impedance ✓ B high input impedance and low output impedance ✓ C voltage gain much greater than 100 typically ✓ D inverted output relative to input always ✓ Show Answer 💡 Explanation: Emitter follower provides unity voltage gain with buffering.
Q18 hard
Audio power amplifier heat sink sizing depends on
A only voltage gain in dB ✓ B only input bias current in pA ✓ C only LED forward voltage ✓ D power dissipation and thermal resistance to ambient ✓ Show Answer 💡 Explanation: Junction temperature must stay below safe limit under load.
Q19 medium
Emitter degeneration resistor without bypass
A maximizes AC gain unconditionally ✓ B prevents any collector current flow ✓ C stabilizes bias and reduces gain but improves linearity ✓ D replaces the need for coupling capacitor ✓ Show Answer 💡 Explanation: Negative feedback via RE reduces gain variation with temperature.
Q20 Past Paper · PPSC/FPSC/NTS medium
Op-amp input offset voltage causes
A small DC output error even with zero input signal ✓ B infinite bandwidth always ✓ C oscillation without any feedback ✓ D input impedance to become zero ✓ Show Answer 💡 Explanation: Mismatch in input transistors produces input-referred offset.
Q21 easy
Non-inverting amplifier closed-loop gain is
A 1 + Rf/R1 ✓ B −Rf/R1 only ✓ C Rf/R1 without unity term ✓ D zero always with feedback ✓ Show Answer 💡 Explanation: Positive input amplified by resistive feedback network.
Q22 easy
Inverting amplifier closed-loop gain is
A 1 + Rf/Rin without sign inversion ✓ B Rf × Rin product only ✓ C independent of feedback resistors ✓ D −Rf/Rin ✓ Show Answer 💡 Explanation: Feedback sets gain to ratio of feedback to input resistors.
Q23 Past Paper · PPSC/FPSC/NTS easy
Virtual short between inputs of op-amp in negative feedback means
A both inputs are physically shorted externally ✓ B inputs carry equal large current always ✓ C voltage difference between inputs is approximately zero ✓ D output is always saturated ✓ Show Answer 💡 Explanation: High gain forces differential input voltage ≈ 0 in linear region.
Q24 easy
Ideal operational amplifier has
A zero gain and zero input impedance ✓ B infinite open-loop gain, infinite input impedance and zero output impedance ✓ C finite gain of unity only always ✓ D output impedance equal to 50 Ω always ✓ Show Answer 💡 Explanation: Ideal op-amp assumptions simplify analysis.
Q25 hard
Safe operating area (SOA) of a transistor specifies
A only maximum power at DC only without pulse duty ✓ B permissible combinations of voltage and current without damage ✓ C only beta at one current point ✓ D only op-amp bandwidth ✓ Show Answer 💡 Explanation: SOA curves include thermal and second-breakdown limits.
Q26 Past Paper · PPSC/FPSC/NTS medium
FET is preferred in high-input-impedance amplifier front ends because
A gate draws negligible DC current ✓ B collector draws maximum base current ✓ C emitter is always forward biased heavily ✓ D drain current equals gate current always ✓ Show Answer 💡 Explanation: Ultra-low gate leakage suits sensor interfaces.
Q27 medium
Darlington pair provides
A unity voltage gain only without current gain ✓ B negative input impedance always ✓ C oscillation without feedback guaranteed ✓ D very high current gain with two cascaded transistors ✓ Show Answer 💡 Explanation: Overall β ≈ β1 × β2 for composite device.
Q28 hard
Channel length modulation in MOSFET is analogous to
A Early effect in BJT ✓ B Zener breakdown in diodes only ✓ C hysteresis in Schmitt trigger only ✓ D sampling aliasing only ✓ Show Answer 💡 Explanation: Short-channel effect raises ID with VDS similar to Early effect.
Q29 Past Paper · PPSC/FPSC/NTS medium
MOSFET switching speed is generally faster than BJT because
A higher beta always ✓ B larger thermal mass always ✓ C majority carrier transport avoids stored minority charge ✓ D always requires higher supply voltage ✓ Show Answer 💡 Explanation: No minority carrier storage delays turn-off.
Q30 hard
BJT current gain β decreases at high collector current due to
A only decrease in supply voltage ✓ B only increase in gate threshold ✓ C high-level injection and base spreading resistance effects ✓ D only diode reverse leakage ✓ Show Answer 💡 Explanation: Physical limits and recombination reduce effective β at high IC.
Q31 medium
Transconductance gm of a FET relates
A small-signal drain current change to gate-source voltage change ✓ B collector current to base current only ✓ C diode forward voltage to current only ✓ D output voltage to supply voltage only ✓ Show Answer 💡 Explanation: gm = ∂ID/∂VGS at the Q-point.
Q32 Past Paper · PPSC/FPSC/NTS medium
JFET gate input impedance is
A very high because gate junction is reverse biased ✓ B very low like forward-biased diode ✓ C equal to 50 Ω always ✓ D determined by collector load resistor only ✓ Show Answer 💡 Explanation: Reverse-biased gate junction minimizes gate current.
Q33 hard
Depletion-mode MOSFET differs from enhancement mode in that it
A never conducts without positive VGS always ✓ B has no channel at manufacture ✓ C uses only PNP structure ✓ D conducts with VGS = 0 and requires negative VGS to turn off (n-channel) ✓ Show Answer 💡 Explanation: Depletion devices have built-in channel doping.
Q34 Past Paper · PPSC/FPSC/NTS easy
Enhancement-mode n-channel MOSFET conducts when
A VGS exceeds threshold voltage positively ✓ B VGS is zero without channel ever ✓ C VDS alone creates channel without gate ✓ D gate is left floating for heavy conduction ✓ Show Answer 💡 Explanation: Positive VGS above Vth induces inversion layer.
Q35 hard
Early effect in a BJT causes
A gate threshold to decrease only in MOSFET ✓ B collector current to increase slightly with collector-emitter voltage ✓ C diode PIV to double ✓ D inductor core saturation ✓ Show Answer 💡 Explanation: Base-width modulation raises IC with increasing VCE.
Q36 easy
MOSFET is a
A voltage-controlled device via gate-source voltage ✓ B current-controlled device like BJT base ✓ C majority carrier device only in depletion mode always without exception ✓ D bipolar device with two PN junctions ✓ Show Answer 💡 Explanation: Gate field controls channel conductivity.
Q37 easy
Coupling capacitor between amplifier stages blocks
A AC signal entirely without DC block ✓ B only high frequencies above 1 MHz always ✓ C feedback path unconditionally ✓ D DC bias while passing AC signal ✓ Show Answer 💡 Explanation: Capacitor passes AC but prevents DC level shift propagation.
Q38 medium
Class AB amplifier improves on Class B by
A eliminating all feedback ✓ B providing small bias so both devices conduct near crossover ✓ C using only single transistor ✓ D operating only in cutoff always ✓ Show Answer 💡 Explanation: Slight overlap reduces crossover distortion.
Q39 Past Paper · PPSC/FPSC/NTS medium
Class B push-pull amplifier each transistor conducts for
A full 360° each simultaneously ✓ B approximately 180° of the cycle ✓ C 90° only without crossover region ✓ D 0° so no output ever ✓ Show Answer 💡 Explanation: Each device handles one half-cycle; crossover distortion possible.
Q40 easy
Class A amplifier conducts
A only 180° of cycle ✓ B less than 90° only ✓ C only during negative half-cycle ✓ D for the full 360° of the input cycle ✓ Show Answer 💡 Explanation: Quiescent current flows continuously; conduction angle 360°.
Q41 easy
Power amplifier is designed to deliver
A only microvolt signals to high-impedance probes ✓ B logic levels to CMOS gates only ✓ C significant power to the load efficiently ✓ D DC offset calibration only ✓ Show Answer 💡 Explanation: Output stage handles large voltage-current product to load.
Q42 Past Paper · PPSC/FPSC/NTS easy
Voltage amplifier ideally increases
A current without voltage change ✓ B power factor of mains only ✓ C signal voltage with minimal loading of source ✓ D frequency of carrier without gain ✓ Show Answer 💡 Explanation: Voltage gain Av = Vout/Vin in small-signal models.
Q43 hard
Rail-to-rail op-amp output stage allows
A output fixed at mid-supply only ✓ B input only on positive rail without negative ✓ C operation without power supplies ✓ D output swing close to both supply rails ✓ Show Answer 💡 Explanation: Extended output range maximizes dynamic range on low supplies.
Q44 medium
Schmitt trigger using op-amp provides
A pure integration without thresholds ✓ B zero output swing always ✓ C infinite CMRR without resistors ✓ D hysteresis to avoid chatter on noisy input signals ✓ Show Answer 💡 Explanation: Positive feedback creates upper and lower threshold levels.
Q45 Past Paper · PPSC/FPSC/NTS hard
Gain-bandwidth product of an op-amp is approximately constant for
A all frequencies without rolloff ✓ B single-pole dominant response in closed-loop designs ✓ C DC offset only ✓ D comparator hysteresis only ✓ Show Answer 💡 Explanation: GBW ≈ AOL × BW; closed-loop bandwidth trades with gain.
Q46 medium
Input bias current of op-amp is
A AC ripple on output only ✓ B slew rate in V/μs ✓ C closed-loop gain in dB only ✓ D average DC current required by the input terminals ✓ Show Answer 💡 Explanation: Bias current flows into BJT bases or FET leakage paths.
Q47 Past Paper · PPSC/FPSC/NTS easy
Op-amp comparator output saturates to
A always mid-rail without saturation ✓ B analog value proportional to difference in linear mode always ✓ C near positive or negative supply depending on input difference ✓ D zero without supply ✓ Show Answer 💡 Explanation: Without negative feedback op-amp acts as high-gain comparator.
Q48 medium
Differentiator op-amp circuit uses
A only resistors in both paths ✓ B inductor in feedback without capacitor ✓ C capacitor at the input and resistor in feedback ✓ D Zener diode for clipping only ✓ Show Answer 💡 Explanation: Capacitor passes high-frequency components for differentiation.
Q49 medium
Integrator op-amp circuit uses
A inductor in input only without capacitor ✓ B capacitor in the feedback path ✓ C resistor-only feedback for integration ✓ D diode bridge in feedback ✓ Show Answer 💡 Explanation: Capacitor integrates input current producing output ∝ ∫vin dt.
Q50 Past Paper · PPSC/FPSC/NTS easy
Unity-gain buffer (voltage follower) uses
A positive feedback only ✓ B 100% negative feedback from output to inverting input ✓ C no feedback connection ✓ D open-loop operation only ✓ Show Answer 💡 Explanation: Non-inverting input driven; output fed back for V+ ≈ V−.
Q51 medium
Common-mode rejection ratio (CMRR) measures
A differential gain only without common signal ✓ B output short-circuit current only ✓ C supply voltage ripple only ✓ D ability to reject equal signals applied to both inputs ✓ Show Answer 💡 Explanation: High CMRR suppresses noise appearing on both inputs.
Q52 medium
Freewheeling diode across an inductive load prevents
A large voltage spikes when switching current off ✓ B forward voltage drop from existing ✓ C oscillator startup without feedback ✓ D op-amp input offset drift ✓ Show Answer 💡 Explanation: Diode provides path for inductive current decay.
Q53 medium
Slew rate of an op-amp limits
A maximum rate of change of output voltage ✓ B DC gain only ✓ C input bias current only ✓ D common-mode rejection at DC only ✓ Show Answer 💡 Explanation: Internal current limits cap dVout/dt especially for large steps.
Q54 Past Paper · PPSC/FPSC/NTS medium
Bypass capacitor across emitter resistor in CE stage
A increases AC gain by shorting emitter resistance at signal frequency ✓ B reduces AC gain to zero always ✓ C blocks AC to the base ✓ D replaces collector load ✓ Show Answer 💡 Explanation: AC ground at emitter removes degeneration for signal.
Q55 Past Paper · PPSC/FPSC/NTS medium
Transformer coupling in amplifiers provides
A infinite bandwidth without leakage inductance ✓ B elimination of all AC coupling ✓ C DC isolation and impedance matching between stages ✓ D direct connection of base to collector ✓ Show Answer 💡 Explanation: Transformer passes AC while blocking DC; can match impedances.
Q56 hard
Total harmonic distortion (THD) measures
A only DC offset magnitude ✓ B only noise floor without harmonics ✓ C harmonic content relative to fundamental in output ✓ D slew rate limit only ✓ Show Answer 💡 Explanation: THD quantifies nonlinear distortion products.
Q57 medium
Differential amplifier rejects
A differential signals between inputs ✓ B common-mode signals applied equally to both inputs ✓ C signals on inverting input only without any gain ✓ D supply voltage variations as common-mode always without CMRR limit ✓ Show Answer 💡 Explanation: Matched pair cancels equal inputs; amplifies difference.